Hardware Architectures for Post-Quantum Digital Signature Schemes

Soni, Deepraj; Basu, Kanad; Nabeel, Mohammed; Aaraj, Najwa; Manzano, Marc; Karri, Ramesh

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification.  The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.

• Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;
• Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;
• Enables designers to build hardware implementations that are resilient to a variety of side-channels.

Details

Published by: Springer

Publication Date: 2021-10-28

Format: Paperback

ISBN-13: 9783030576844

DOI: 10.1007/978-3-030-57682-0

Dimensions: 235cm x155cm

Pages: 170