{"product_id":"9781461356776","title":"On-Chip Inductance in High Speed Integrated Circuits","description":"\u003ch1\u003eOn-Chip Inductance in High Speed Integrated Circuits\u003c\/h1\u003e \u003ch2\u003eIsmail, Yehea I.; Friedman, Eby G.\u003c\/h2\u003e \u003cp\u003eThe appropriate interconnect model has changed several times  over the past two decades due to the application of aggressive  technology scaling. New, more accurate interconnect models are  required to manage the changing physical characteristics of integrated  circuits. Currently, \u003cem\u003eRC\u003c\/em\u003e models are used to analyze high  resistance nets while capacitive models are used for less resistive  interconnect. However, on-chip inductance is becoming more important  with integrated circuits operating at higher frequencies, since the  inductive impedance is proportional to the frequency. The operating  frequencies of integrated circuits have increased dramatically over  the past decade and are expected to maintain the same rate of increase  over the next decade, approaching 10 GHz by the year 2012. Also, wide  wires are frequently encountered in important global nets, such as  clock distribution networks and in upper metal layers, and performance  requirements are pushing the introduction of new materials for low  resistance interconnect, such as copper interconnect already used in  many commercial CMOS technologies. \u003cbr\u003e  \u003cem\u003eOn-Chip Inductance in High Speed Integrated Circuits\u003c\/em\u003e deals with  the design and analysis of integrated circuits with a specific focus  on on-chip inductance effects. It has been described throughout this  book that inductance can have a tangible effect on current high speed  integrated circuits. For example, neglecting inductance and using an  \u003cem\u003eRC\u003c\/em\u003e interconnect model in a production 0.25 mum CMOS  technology can cause large errors (over 35%) in estimates of the  propagation delay of on-chip interconnect. It has also been shown that  including inductance in the repeater insertion design process as  compared to using an \u003cem\u003eRC\u003c\/em\u003e model improves the overall repeater  solution in terms of area, power, and delay with average savings of  40.8%, 15.6%, and 6.7%, respectively. \u003cbr\u003e  \u003cem\u003eOn-Chip Inductance in High Speed Integrated Circuitsis full of  design and analysis techniques for \u003cem\u003eRLC\u003c\/em\u003e interconnect. These  techniques are compared to techniques traditionally used for \u003cem\u003eRC\u003c\/em\u003e  interconnect design to emphasize the effect of inductance. \u003cbr\u003e  \u003cem\u003eOn-Chip Inductance in High Speed Integrated Circuits\u003c\/em\u003e will be of  interest to researchers in the area of high frequency interconnect,  noise, and high performance integrated circuit design.\u003c\/em\u003e\u003c\/p\u003e \u003ch3\u003eDetails\u003c\/h3\u003e \u003cp\u003ePublished by: Springer\u003c\/p\u003e \u003cp\u003ePublication Date: 2012-10-23\u003c\/p\u003e \u003cp\u003eFormat: Paperback\u003c\/p\u003e \u003cp\u003eISBN-13: 9781461356776\u003c\/p\u003e \u003cp\u003eDOI: 10.1007\/978-1-4615-1685-9\u003c\/p\u003e \u003cp\u003eDimensions: 235cm x155cm\u003c\/p\u003e \u003cp\u003ePages: 303\u003c\/p\u003e ","brand":"Springer US","offers":[{"title":"Default Title","offer_id":47188280639628,"sku":"9781461356776","price":98.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0710\/9545\/1788\/files\/9781461356776.jpg?v=1775049443","url":"https:\/\/fh90cf-fv.myshopify.com\/products\/9781461356776","provider":"Late Knight Books and Services, LLC","version":"1.0","type":"link"}