Offset Reduction Techniques in High-Speed Analog-to-Digital Converters: Analysis, Design and Tradeoffs

Figueiredo, Pedro M.; Vital, João C.

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

Details

Published by: Springer

Publication Date: 2009-03-09

Format: Hardcover

ISBN-13: 9781402097157

DOI: 10.1007/978-1-4020-9716-4

Dimensions: 235.0cm x155.0cm

Pages: 382.0