{"product_id":"9780792397441","title":"Quick-Turnaround ASIC Design in VHDL: Core-Based Behavioral Synthesis","description":"\u003ch1\u003eQuick-Turnaround ASIC Design in VHDL: Core-Based Behavioral Synthesis\u003c\/h1\u003e \u003ch2\u003eBouden-Romdhane, N.; Madisetti, Vijay; Hines, J.W.\u003c\/h2\u003e \u003cp\u003eFrom the Foreword..... \u003cbr\u003e  Modern digital signal processing applications provide a large  challenge to the system designer. Algorithms are becoming increasingly  complex, and yet they must be realized with tight performance  constraints. Nevertheless, these DSP algorithms are often built from  many constituent canonical subtasks (e.g., IIR and FIR filters, FFTs)  that can be reused in other subtasks. Design is then a problem of  composing these core entities into a cohesive whole to provide both  the intended functionality and the required performance. \u003cbr\u003e  In order to organize the design process, there have been two major  approaches. The top-down approach starts with an abstract, concise,  functional description which can be quickly generated. On the other  hand, the bottom-up approach starts from a detailed low-level design  where performance can be directly assessed, but where the requisite  design and interface detail take a long time to generate. In this  book, the authors show a way to effectively resolve this tension by  retaining the high-level conciseness of VHDL while parameterizing it  to get good fit to specific applications through reuse of core library  components. Since they build on a pre-designed set of core elements,  accurate area, speed and power estimates can be percolated to high-  level design routines which explore the design space. Results are  impressive, and the cost model provided will prove to be very useful.  Overall, the authors have provided an up-to-date approach, doing a  good job at getting performance out of high-level design. \u003cbr\u003e  The methodology provided makes good use of extant design tools, and is  realistic in terms of the industrial design process. The approach is  interesting in its own right, but is also of direct utility, and it  will give the existing DSP CAD tools a highly competitive alternative.  The techniques described have been developed within ARPAs RASSP (Rapid  Prototyping of Application Specific SignalProcessors) project, and  should be of great interest there, as well as to many industrial  designers. \u003cbr\u003e  \u003cstrong\u003eProfessor Jonathan Allen, Massachusetts Institute of Technology\u003c\/strong\u003e\u003c\/p\u003e \u003ch3\u003eDetails\u003c\/h3\u003e \u003cp\u003ePublished by: Springer\u003c\/p\u003e \u003cp\u003ePublication Date: 1996-06-30\u003c\/p\u003e \u003cp\u003eFormat: Hardcover\u003c\/p\u003e \u003cp\u003eISBN-13: 9780792397441\u003c\/p\u003e \u003cp\u003eDOI: 10.1007\/978-1-4613-1411-0\u003c\/p\u003e \u003cp\u003eDimensions: 235.0cm x155.0cm\u003c\/p\u003e \u003cp\u003ePages: 180.0\u003c\/p\u003e ","brand":"Springer US","offers":[{"title":"Default Title","offer_id":45578421207180,"sku":"9780792397441","price":152.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0710\/9545\/1788\/files\/9780792397441.jpg?v=1767146750","url":"https:\/\/fh90cf-fv.myshopify.com\/products\/9780792397441","provider":"Late Knight Books and Services, LLC","version":"1.0","type":"link"}