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Built In Test for VLSI

Built In Test for VLSI Pseudorandom Techniques

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Built In Test for VLSI

Pseudorandom Techniques

Paul H. Bardell | W. H. McAnney | J. Savir

Technology & Engineering / Electronics / General

This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.

Paul H. Bardell and W. H. McAnney are the authors of Built In Test for VLSI: Pseudorandom Techniques, published by Wiley.


Publication Date: 20 October 1987
Publisher: Wiley
Imprint: Wiley-Interscience
ISBN-13: 9780471624639
Format: Hardback
Page Count: 368
Weight (oz): 21.52

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